Vị Trí Tuyển Dụng

    IP-BASED ASIC DESIGN AND VERIFICATION (DV)

    Tòa FPT Tower, Số 10 Phạm Văn Bạch, Cầu Giấy, Hà Nội

    • Số lượng cần tuyển: 1
    • Loại hình công việc: Toàn thời gian
    • Đơn vị quản lý: Dự án AI Chip
    • Mức lương: lương thỏa thuận
    • Hạn nộp hồ sơ:

      30-09-2026

    CHI TIẾT CÔNG VIỆC

     

    1. Verification Planning:

    - Analyze design specifications (Specs) to understand the architecture, functionality, and performance requirements.

    - Develop comprehensive verification plans, defining test strategies and identifying critical "corner-case" scenarios.

    2. Testbench Development:

    - Design and implement scalable, automated verification environments using SystemVerilog and UVM (Universal Verification Methodology).

    - Develop verification components including Drivers, Monitors, Scoreboards, and Sequencers to automate the checking process.

    - Execute simulations to verify the RTL code against the design intent.

    - Perform deep-dive debugging to identify root causes of failures and work closely with RTL Designers to resolve issues.

    - Run regression tests to ensure that new code changes do not break existing functionalities.

    3. Coverage Closure:

    - Analyze Code Coverage and Functional Coverage to ensure 100% verification of the design.

    - Produce detailed verification reports and assess the readiness of the design for tape-out.

    4. Execution & Bug Hunting:

    - Execute simulations to verify the RTL code against the design intent.

    - Perform deep-dive debugging to identify root causes of failures and work closely with RTL Designers to resolve issues.

    - Run regression tests to ensure that new code changes do not break existing functionalities.

     

    YÊU CẦU CÔNG VIỆC

    • Education: Bachelor’s or Master’s degree in Electronics & Telecommunications, Computer Engineering, Microelectronics, or a related field.
    • Core Technical Skills:
    • Strong understanding of Digital Logic Design and Hardware Description Languages (Verilog/SystemVerilog).
    • Hands-on experience with UVM (or OVM/VMM) verification methodologies.
    • Proficiency in using industry-standard EDA tools from Cadence (Xcelium/JasperGold), Synopsys (VCS/Verdi), or Siemens/Mentor (Questa).
    • Support Skills:
    • Experience with scripting languages like Python, Perl, or Shell for automation.
    • Knowledge of peripheral protocols (I2C, SPI, UART, AHB/APB, PCIe, etc.) is a strong plus.
    • Mindset & Soft Skills:
    • A "Zero-Defect" mindset with extreme attention to detail.
    • Sharp analytical and troubleshooting skills (a passion for debugging).
    • Good English communication skills (reading technical documents and reporting).
    • Ability to work effectively in a high-pressure, fast-paced R&D environment.

    QUYỀN LỢI

    • Strategic Impact: Be part of the first team in Vietnam to design and commercialize proprietary chips for the global market.
    • World-Class Tools: Get access to the latest, high-end EDA toolsets and powerful server infrastructure.
    • Competitive Compensation: Attractive salary, performance bonuses (Tape-out/Design-win bonuses), and 13th-month salary.
    • Exclusive Benefits: Premium health insurance (FPT Care) for you and your family; a creative and modern workspace.
    • Expert Mentorship: Work alongside top-tier semiconductor experts from around the world.
    • Career Growth: Clear promotion paths into Lead Engineer or Architect roles.

    THÔNG TIN THAM KHẢO

    NƠI LÀM VIỆC
    - Tòa FPT Tower, Số 10 Phạm Văn Bạch, Cầu Giấy, Hà Nội

    THÔNG TIN LIÊN HỆ

    Thông tin liên hệ: Phùng Thị Thùy Dung
    Email: dungptt13@fpt.com
    Điện thoại cố định: 02473002222
    Điện thoại di động: 0944561192
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    Dự án AI Chip


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