CHI TIẾT CÔNG VIỆC

About the Role:

We are looking for an experienced and visionary Physical Design Manager to lead our PD team in the ambitious AI Chip Project at FPT Telecom. You will drive the physical implementation strategy, build and mentor a high-performing team, and ensure the successful tape-out of complex AI SoCs. This is a unique opportunity to lead a core hardware team in a pioneer "Make in Vietnam" semiconductor project.

Key Responsibilities:

• Technical Leadership: Lead the end-to-end Physical Design cycle (Netlist to GDSII) for large-scale, high-performance AI SoCs in advanced nodes (e.g., 28nm, 12nm, or below).

• Project Management: Plan and manage PD schedules, resources, and milestones to meet aggressive tape-out deadlines.

• Methodology & Flow: Define and continuously improve physical design methodologies, flows, and PPA (Power, Performance, Area) optimization strategies.

• Cross-functional Collaboration: Act as the primary liaison between the PD team and other domains (Architecture, RTL, DV, DFT, Packaging, and external Foundries/Vendors) to resolve complex integration issues.

• Team Building: Recruit, train, and mentor PD engineers. Foster a culture of excellence, innovation, and knowledge sharing within the team.

• Sign-off: Take final responsibility for all tape-out sign-off criteria, including Timing (STA), Physical Verification (DRC/LVS), and Power/EMIR.

YÊU CẦU CÔNG VIỆC

• Education: Bachelor’s or Master’s degree in Electronics, Computer Engineering, or a related field.
• Experience: 8+ years of experience in ASIC Physical Design, with at least 2-3 years in a leadership or management role.
• Technical Skills:
  • Proven track record of successful tape-outs of complex SoCs in advanced FinFET nodes.
  • Deep expertise in all phases of physical implementation: Floorplanning, CTS, Routing, STA, EM/IR, and Physical Verification.
  • Mastery of top-tier EDA toolchains (Synopsys or Cadence).
  • Strong understanding of chip architecture, low-power methodologies (UPF/CPF), and package co-design.
• Leadership Skills: Excellent project management, communication, and negotiation skills. Ability to lead under pressure and drive technical decisions. Fluent in English.

QUYỀN LỢI

1. BE A CHIP MAKER - NOT JUST A CODER

• Full-Flow Ownership: Take ownership of the entire design lifecycle. You will not just write code; you will work closely with Architecture, DV, PD, DFT, and Power teams to bring a Large-Scale SoC from concept to Tape-out.
• Cutting-Edge Tech: Work on advanced ASIC IP-based architectures for AI & Smart Camera applications. Handle sophisticated sub-systems and internal/external IP integration.
• Impactful Work: Develop methodology, flows, and checks that ensure our chips deliver the highest quality and efficiency (TOPs/Watt).
• Make an Impact: Be part of the pioneer team building Vietnam's core semiconductor technology. Your work will directly power millions of smart cameras and IoT devices.

2. TOP-TIER BENEFITS & CARE

• Competitive Package: Attractive salary + 13th-month salary + Performance-based bonuses.
• Premium Healthcare: Exclusive FPT Care insurance package (covering you and your family) with access to top international hospitals. Annual high-quality health check-ups.
• Work-Life Balance: Full compliance with Labor Law, generous leave policies, and care for employees' spiritual lives.

3. DYNAMIC ENVIRONMENT & GROWTH

• Vibrant Culture: Join a friendly, open team with the unique "STCo" culture. Enjoy exciting activities: Teambuilding, Company Trips, Talent Shows (Sao Choi), Festivals, and more!
• Career Path: Clear roadmap for promotion and technical development. Work with modern facilities and high-quality equipment.
• Exclusive Perks: Special discounts on FPT Telecom & FPT ecosystem services.

THÔNG TIN THAM KHẢO

• Tìm hiểu về FPT Telecom tại đây
• Quy trình tuyển dụng tại FPT tại đây

NƠI LÀM VIỆC